Level shifters are circuits that are used in electronic systems including multiple voltage domains. In such multiple voltage domain systems, different blocks of circuitry operate at different voltage levels and level shifters function to convert signals in one voltage domain to signals in another voltage domain. Different blocks of circuitry can be different functional circuits on the same chip or integrated circuit, such as memory blocks and analog blocks, for example, or in system-on-a-chip applications. Different blocks can also correspond to different integrated circuits that are electrically interconnected to form a desired system. At least some of these different blocks have different voltage domains (i.e., utilize different supply voltages) and thus level shifters are utilized to “shift” signal levels in communicating signals from one block to another. For example, some blocks of circuitry may utilize a 1.8V supply voltage, other blocks a 2.5V supply voltage, and still other blocks a 3.3V supply voltage. Level shifters may be needed when a signal passes from one voltage domain to another.
In state of the art integrated circuits utilizing Metal-Oxide-Semiconductor (MOS) devices having a feature size or dimensions below 40 nm, for example, maximum voltage stress tolerances of oxides in the devices also necessitate the use of level shifters to ensure such tolerances are not exceeded, which may damage the devices. In such advanced MOS technologies (i.e., with devices having dimensions below 40 nm) a maximum voltage stress tolerance may be 2.0 volts, for example. In this situation, a wide supply voltage range circuit, such as a level shifter circuit contained in an input/output (I/O) buffer, which can receive a wide supply voltage range (e.g., 1.8V, 2.5V, 3.3V) can result in damage to the MOS devices forming the buffer since the maximum voltage stress tolerance on a MOS device may be exceeded. Thus, the required level shifting function of such a buffer that communicates signals between voltage domains must not result in damage to the MOS device forming the buffer due to the maximum voltage stress tolerance being exceeded. A conventional approach to provide these level-shifting I/O buffers is to provide circuitry that is configured in response to voltage level control signals having values determined by the provided supply voltage levels such that the circuitry is configured so none of the MOS devices forming the buffer are damaged due to the maximum voltage stress tolerance being exceeded. In certain architectures of such level-shifting I/O buffers it is difficult to provide the required voltage level control signals to each of the buffers to configure them as required as a function of the supply voltage being provided. Accordingly, improved methods and circuits for level shifters and level-shifting buffers containing such level shifters are needed.